Job Directory Cadence Principal Application Engineer - Digital Implementation Lead
Cadence

Principal Application Engineer - Digital Implementation Lead Cadence
Austin, TX

Cadence Design Systems is an electronic design automation and intelligent system design provider delivering hardware, software, and IP for electronic design.

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About Cadence

Job Description

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

This individual is the primary focal point for technical issues, questions, and discussions for large customer engagements. Leads and provides technical direction for team of application engineers and R&D. Leads discussions with customers, capable of influencing outcomes among customers, R&D and Cadence technical team members. * Helps to mentor other engineers regarding technical topics for a given project. * Good consulting/client skills. * Review, document and resolve project technical issues. * Must have an understanding of Cadence digital IC tools. Experience with competitive tools beneficial. * Design Reviews: guides and directs design reviews; final authorization on design issues. Helps to identify technical skills that are needed, but not yet available for a given project.

We need a pro-active, enthusiastic, customer-facing solution engineer who is an expert in circuits, design and timing analysis. This person will be focused on working with customer in digital IC place and route solution space.

The ideal candidate should have:

Requirements:

(1) Requires a BS or MS in EE with 7-10+ years industry related experience in design and EDA (Digital Implementation/Signoff)

(2) Experience using Digital software with at least one major EDA vendor flow. Automation skills using Perl, Tcl and shell scripting essential

(3) Strong analytical & analysis skills covering digital implementation is critical.

(4) Proven track record and experience leading team in fast paced environment

(5) Excellent customer interaction & presentation skills

Should have exposure in:

* Clock Distribution Management * Power Planning * Top-Level timing closure.Block Design: * Timing Verification * Block level Place and Route * Xtalk analysis and fixing * Physical VerificationChip Assembly * Chip Level Place and Route * Physical Verification * Final Post Processing Steps (to generate the GDSII) * Timing VerificationLEC Verification from gate-level netlist through physical design.Signal Integrity * Familiarity with SI affects on high-speed designs

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About Cadence

Cadence Design Systems is an electronic design automation and intelligent system design provider delivering hardware, software, and IP for electronic design.

Headquarters
Size
8100 employees
Cadence

Building 8, 2655 Seely Ave

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