Hardware Engineer Teradyne
North Reading, MA

Job Description

Duties & Responsibilities

Design and model digital signal processing algorithms using C/C++. Implement digital signal processing algorithms on target hardware. Lead and drive performance analysis, test, troubleshoot, and debug DSP based products. Support the lab debug of designs. Provide written and oral communication to team members.

Basic Qualifications, Experience, Skills & Education Required

Requirements include a Bachelor's degree or equivalent in Electrical Engineering, Computer Engineering, or closely related field and three years of work experience in the job offered or related field of embedded firmware, software or FPGA product development environment; or in the alternative, a Master's degree or equivalent and one year of work experience.

If qualifying with a Bachelor's degree, must have at least three years' experience with coding for embedded systems and DSP with lower level languages (e.g. C, assembly, RTL); at least three years' experience with signal processing concepts, especially in digital filter design theory and practice; at least three years' experience with fixed-and floating -point implementation on DSPs; at least three years' experience in MATLAB and with scripting languages such as Python and Perl; and at least three years' experience with FPGA design tools: System Generator for DSP or DSPBuilder and Vivado Design Suite or Quartus Prime.

If qualifying with a Master's degree, must have at least one year experience with coding for embedded systems and DSP with lower level languages (e.g. C, assembly, RTL); at least one year experience with signal processing concepts, especially in digital filter design theory and practice; at least one year experience with fixed-and floating -point implementation on DSPs; at least one year experience in MATLAB and with scripting languages such as Python and Perl; and at least one year experience with FPGA design tools: System Generator for DSP or DSPBuilder and Vivado Design Suite or Quartus Prime.