Digital Design Engineer, Senior Qualcomm
San Diego, CA

Job Description

Job Detail

Job Id E1968804 Job Title Digital Design Engineer, Senior Post Date 04/08/2019 Company - Division Qualcomm Atheros Inc - Qualcomm Atheros

Job Area Engineering - Hardware

Location California - San Diego

Job Overview You will be an integral part of a Bluetooth team with opportunity to grow into a lead role within the organization. You will develop Bluetooth 15.4 or other WPAN wireless technologies combined with CPU, memory system, security, and IP. You will participate or lead the integration of that IP into the companys world class integrated circuits targeted at cell phone, tablet, IOT, and automotive applications. You will develop or contribute to the specifications of the IP and drive the micro-architecture discussion for it. You will work with engineers to develop and deliver the design and test it at unit-level and integrated-level test benches. Using these platforms, you will be responsible for debugging your designs at connectivity module level, and chip level modes. You will assist with the timing closure of your designs. You will make regular contributions to the overall improvement in design methodology to drive productivity and initiatives. All Qualcomm employees are expected to actively support diversity on their teams, and in the Company. Minimum Qualifications Bachelor's degree in Science, Engineering, or related field.

2+ years ASIC design, verification, or related work experience.

" id="hdnMinimumQualifications" />Bachelor's degree in Science, Engineering, or related field.

2+ years ASIC design, verification, or related work experience.

Preferred Qualifications Up to 8 years experience in digital ASIC design. ASIC frontend development for low power applications. Hardware description languages (Verilog, System Verilog and VHDL). AMBA bus standards such as AXI, AHB, and ACE. Synopsys DC/PrimeTime or similar tools. Scripting/programming in C/C++, TCL, Perl/Csh. Demonstrable knowledge of Bluetooth, BT Low Energy, 15.4, NFC or similar wireless communication systems, including protocol layer, modem, and radios. Knowledge and working experience on WIFI/LTE/Bluetooth coexistence. Architectural experience in the CPU and subsystems for application specific ICs. Knowledge of signal processing techniques used in RF communications. Familiarity with FPGA-based emulation platforms. Demonstrable expertise in implementing complex multi-domain synchronization and pipelining design Significant contributions in the bring-up of at least two (SOC) chips and placed them into production. Experience on at least two SoC designs with direct participation from micro-architecture design through tapeout. Demonstrable project management skills based on tracking in Microsoft or equivalent tool. Excellent verbal and written communication skills. The candidate will need to be coordinating the integration process across continents and cultures. " id="hdnPreferredQualifications" />Up to 8 years experience in digital ASIC design. ASIC frontend development for low power applications. Hardware description languages (Verilog, System Verilog and VHDL). AMBA bus standards such as AXI, AHB, and ACE. Synopsys DC/PrimeTime or similar tools. Scripting/programming in C/C++, TCL, Perl/Csh. Demonstrable knowledge of Bluetooth, BT Low Energy, 15.4, NFC or similar wireless communication systems, including protocol layer, modem, and radios. Knowledge and working experience on WIFI/LTE/Bluetooth coexistence. Architectural experience in the CPU and subsystems for application specific ICs. Knowledge of signal processing techniques used in RF communications. Familiarity with FPGA-based emulation platforms. Demonstrable expertise in implementing complex multi-domain synchronization and pipelining design Significant contributions in the bring-up of at least two (SOC) chips and placed them into production. Experience on at least two SoC designs with direct participation from micro-architecture design through tapeout. Demonstrable project management skills based on tracking in Microsoft or equivalent tool. Excellent verbal and written communication skills. The candidate will need to be coordinating the integration process across continents and cultures. Education Requirements Bachelor's degree in Science, Engineering, or related field Keywords RTL, Synthesis, Timing Closure, FPGA, Xilinx